The honest answer is: partially, and only for specific tasks. Current AI systems can assist meaningfully with schematic generation, component selection, BOM optimization, and writing firmware stubs—but ask one to route a dense multilayer PCB with controlled impedance traces and thermal constraints, and it will either fail outright or produce something that looks plausible but won't pass DRC. The gap between "generates a schematic that looks right" and "produces a manufacturable board" is still enormous.
Where AI genuinely adds value today is in the early, more language-like parts of the design process. Tools built on large language models can translate a functional description into a reasonable starting schematic, suggest appropriate ICs given a set of specs, flag common design pitfalls, and generate datasheet summaries faster than any engineer can read them. For a junior engineer or a software developer moving into hardware, this is a real productivity multiplier on the research and scoping phase.
Layout—the physical placement and routing of components on a board—remains the hard wall. PCB layout is a constrained optimization problem involving electrical, thermal, mechanical, and manufacturing rules that interact in non-obvious ways. Existing AI approaches struggle with the spatial reasoning required, and the training data for high-quality layouts is scarce and proprietary. Autorouters have existed for decades and experienced engineers still largely distrust them for anything beyond simple boards; AI hasn't fundamentally changed that picture yet.
Analog and RF design is an even steeper cliff. A language model has no reliable internal model of parasitic capacitance, ground plane behavior, or the way a trace length affects signal integrity at 5 GHz. It can recite rules of thumb, but applying them correctly to a specific board geometry requires the kind of iterative simulation-and-judgment loop that current AI tools don't support end-to-end.
The practical takeaway for builders: treat AI as a capable research assistant and first-draft generator for the front end of your hardware workflow. Use it to accelerate component research, generate initial schematics for review, and sanity-check against common mistakes. Don't hand it a spec and expect a Gerber file you can send to a fab. The leverage is real—just scoped to the parts of the process that resemble structured text generation rather than constrained physical design.
Watch the space around AI-assisted EDA tools specifically—companies integrating LLMs directly into tools like KiCad or Altium, with access to real netlist and layout context, are the most likely path toward genuinely useful AI layout assistance. That integration work is early but active, and it's where the next meaningful capability jump will come from.